Oc-i2c is a project mainly written in VERILOG and VHDL, it's free.
I2C controller core from Opencores.org
h1. Description
I2C is a two-wire, bidirectional serial bus that provides a simple, efficient method of data exchange between devices. It is primarily used in the consumer and telecom market sector and as a board level communications protocol. The OpenCores I2C Master Core provides an interface between a Wishbone Master and an I2C bus. It is an easy path to add I2C capabilities to any Wishbone compatible system. You can find the I2C specifications on Phillips web Site. Work was originally started by Frédéric Renet. You can find his webpage here.
h1. Features
h1. Documentation
h1. Licensing
Check the FAQ page for information regarding Philips I2C/SMBus licensing information.
h1. Status
h1. Synthesis results
Push-button synthesis results for various targets.
Actel:
Altera:
Xilinx:
Users